As a
leading provider of software and hardware based H.264/AVC
video solutions, FastVDO offers cost-effective and
well-suited technology to our customers that enable them to
achieve measurable improvements in their business
performance.
Adding to
our comprehensive range of leading video technology, FastVDO
has developed a customizable ASIC IP for decoding H.264
compliant streams. DSPs and other processors are incapable
of handling complex algorithms employed in H.264 and DSP
based solutions support limited resolutions and consume lot
of power. To overcome this problem, FastVDO has developed
customizable ASIC IP that can be easily incorporated in any
SOC or media processors. The core is customizable and is
completely compliant to Baseline or main profile. The core
has been prototyped on Xilinx Virtex4 based FPGA board for
complete functionality.
salient features
Decoder Core
is completely pipelined hardware architecture and does not
use any processor or DSP cores.
Single S-RAM,
SD-RAM or DDR-RAM required. Core can have independent or
high speed shared memory
Synchronous
single clocked design and low power architecture
Minimal
processing required from host CPU. Core can be fully
autonomous or stream can be fed through the host
Supports
various resolutions from sub QCIF to HD; core is
customizable to provide optimal performance in power
consumption
Supports both
entropy coding techniques (CAVLC and CABAC)
Supports all
modes of intra and inter prediction techniques with up to
quarter pixel interpolation
Supports
interlace decoding and in loop de-blocking filter
IP core is
prototyped on a Xilinx FPGA and provide real time
verification of the decoder
Ideal for
mobile processors, set-top boxes, handheld devices, media
processors all low power and compact multimedia SOCs
FastVDO can
extend design services and tool support for integration of
the decoder IP core
